1. Field of Invention
This invention relates to a dual computer system using two processor units to improve continuity of control at the time of dual switching; and, more particularly, to a dual computer system comprising two processor units, of which one is an operated state, while the other is in a standby state for use in the event of failure of the operated unit, and a dual control unit for controlling and monitoring the operation of the two processor units to actuate one unit while keeping the other unit in the standby state.
2. Description of the Prior Art
A dual system has been used in the prior art to enhance reliability of a control system. Such a dual system, which uses two processor units or computers is disclosed, for example, in U.S. Pat. Nos. 3,503,048; 3,562,716 and 3,864,670.
FIG. 1 depicts such a prior art dual control system which is disclosed in U.S. Pat. No. 3,864,670. The system comprises two processor units or computers PC1, PC2; a dual control unit DXC for monitoring operation of the processor units; and a plurality of input/output units IO.sub.1 . . . IO.sub.n connected to the two processor units through a bus and switch.
Dual control unit DXC monitors operation of processor units PC1, PC2; actuates either one (e.g. PC1) of the processor units PC1,PC2 while keeping the other (e.g. PC2) on standby; and operates the switch to assign actual operation to unit PC2 when processor unit PC1, which in an operated state fails or is demounted from the system, e.g. for for maintenance work or the like.
Generally, the dual control unit DXC uses a reset signal of the system for timing to switch the operated state to the standby state. If such system is once reset, then a manipulating time for initialization is required before return. Thus, such a computer control will be suspended for several hundred milliseconds to several seconds.